DRIFT: Decoupled CompileR-Based Instruction-Level Fault-Tolerance

نویسندگان

  • Konstantina Mitropoulou
  • Vasileios Porpodas
  • Marcelo Cintra
چکیده

Compiler-based error detection methodologies replicate the instructions of the program and insert checks wherever it is needed. The checks evaluate code correctness and decide whether or not an error has occurred. The replicated instructions and the checks cause a large slowdown. In this work, we focus on reducing the error detection overhead and improving the system’s performance without degrading fault-coverage. DRIFT achieves this by decoupling the execution of the code (original and replicated) from the checks. The checks are compare and jump instructions. The latter ones sequentialize the code and prohibit the compiler from performing aggressive instruction scheduling optimizations. We call this phenomenon basicblock fragmentation. DRIFT reduces the impact of basic-block fragmentation by breaking the synchronized execute-check-confirm-execute cycle. In this way, DRIFT generates a scheduler-friendly code with more ILP. As a result, it reduces the performance overhead down to 1.33× (on average) and outperforms the state-of-the-art by up to 29.7% retaining the same fault-coverage. The evaluation was done on an Itanium2 by running MediabenchII and SPEC2000 benchmark suites.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Performance optimizations for compiler-based error detection

The trend towards smaller transistor technologies and lower operating voltages stresses the hardware and makes transistors more susceptible to transient errors. In future systems, performance and power gains will come at the cost of unreliable areas on the chip. For this reason, there is an increased need for low-overhead highlyreliable error detection methodologies. In the last years, several ...

متن کامل

Enabling Loop Parallelization with Decoupled Software Pipelining in LLVM: Final Report

Software pipelining is an optimization technique used to speed up the execution of loops. A compiler performing the optimization reorders instructions within a loop in order to minimize latencies and avoid wasting instruction cycles. The optimization parallels the out-of-order execution paradigm used by microprocessors, except that instruction reordering is done at the software level, i.e. by t...

متن کامل

Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer

Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compilerbased MIR designshave also been developed which remove rollbackdata hazards directlywith data-flowtransformations. ...

متن کامل

Dynamic Branch Decoupled Architecture

We propose an alternative approach to branch resolution based on the earlier work on decoupled memory architectures. Branch decoupling is a technique to decouple a single instruction stream program into two streams. One stream is solely dedicated to resolving branches as early as possible (both the branch condition and the branch target). The resolved branch targets are consumed by the other co...

متن کامل

A Decoupled Federate Architecture for Distributed Simulation Cloning

Distributed simulation cloning technology is designed to perform “what-if” analysis of existing High Level Architecture (HLA) based distributed simulations. The technology aims to enable the examination of alternative scenarios concurrently within the same simulation execution session. State saving and recovery are necessary for cloning a federate at runtime. However it is very difficult to hav...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2013